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Grex Agora Item 42: Sun(Sparc) System Architecture/What is Grex running now?
Entered by lar on Sun Mar 15 14:31:29 UTC 2020:

When I first came to Grex back in the 90s it was running a Sun 3/260 (I 
think it had a 68000 processor) down in the dungeon.(but maybe that was 
before my time?)
  Then there was a move to a 4/260 (16 hardware contexts.) There was an 
unfinished Sun 4/670(2 Sparcs with 4096 contexts each) in the Pumpkin 
when grex moved there that was going to be "next grex". This was before 
the change over to i86 platform. Here is link on that build:

https://www.unixpapa.com/newgrex/

I remember the i86 change because I was building systems on that 
architecture at the time. I though the Athlon decision was a bad one. By
 that time I had built hundreds of systems(working for a local supply 
house)using both Intel and Athlon CPUs. Let's say you forgot to hook up 
the power connector for the fan. Believe me this happened more than once
 because of the rush. If you had an Intel chip that sucker would
actually  run for a while before it cooked. But every time, and I mean
everytime  this happened with an Athlon? It fried instantly. Due to that
I just  thought Intels were better, even if Atlon had a small speed
advantage at  the time. In case , I now have two questions

1) Why were the "hardware contexts" that  Sun had and i86 didn't so 
desirable. It was more than simple multi-tasking right? Something with 
multi-user? 
2)What is grex running on today? Is it still running VM along with m-net
 in tonster's basement?

4 responses total.

#1 of 4 by lar on Sun Mar 15 14:32:49 2020:

There seems to be some Sparc systems around today. They are called 
"Oracle" servers now since they bought Sun.

https://www.oracle.com/servers/finder/

#2 of 4 by tod on Sun Mar 15 17:54:45 2020:

re #0
RISC like DEC Alpha, SPARC, MIPS could multitask with things like branch
prediction.  The OSes were proprietary but eventually the RISC on DEC Alpha
was ported to Alpha NT and eventually quad processing HP or DEC NT.
Thus NT4 and so forth.
That's my very watered down analogy of the why.

Cost and human skillsets were also a factor.  The 'better' hardware lost
to lower skills and cheaper h/w.

#3 of 4 by lar on Mon Apr 6 19:43:47 2020:

So each hardware context will have it's own set of registers? This keeps
 the cpu from having to access the IDT for a thread? Am on the trail
here  have a veered off course?

#4 of 4 by lar on Mon Apr 6 19:45:02 2020:

IDT = "interrupt descriptor table for x86 architecture or does sun call
it  something different?

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