What are we doing here?

Jul 28 15:43 UTC 1991

Goodness! I joined this conference only to find out that there's nothing in it
and what's worse, I'm the FW. I guess that's only fair, since I requested a
conference of this nature. What I'm interested in (at least initially) is a
forum for exchanging information on hardware (and other interesting things). I
have been acquiring a lot of "obsolete" hardware from my place of employment
and there is usually not any documentation. Most of this junk I intercept on
its way to the dumpster (and a very high percentage of it still works). I think
that a lot more of it is salvageable but I can't tell for sure because I have
no idea what the switch settings should be on various boards. I have been able
to get my hands on a fair amount of documentation of one sort or another and
have had the opportunity to try a lot of things. I suspect that there are more
people out there that do the same. So here we go ...

response 2 of 60:

Jul 29 13:51 UTC 1991

Wait a year ...

response 4 of 60:

Aug 4 16:06 UTC 1991

What are they? ;)

response 6 of 60:

Aug 5 03:31 UTC 1991

So how big is this PDP-11/40, and what does it run?

response 8 of 60:

Aug 5 03:42 UTC 1991

It runs V6 Unix.  Maybe BSD 2.9.  It doesn't have split I&D, so the
kernel can only be 64K...You can't fit much Unix in 64K.

Maybe you can find a version of CP/M for it.

response 10 of 60:

Aug 5 12:58 UTC 1991

Instruction & Data.  "Split I&D" means that "instruction" and "data"
space can be split between two logical memory segments, instead of being
combined into one, flat memory space.  Usually this is done on machines
that can only directly address a small amount of memory (on the PDP-11,
this "small amount" is 64K, since there are only 16 address lines) to
expand the maximum program size and still allow the kernel to relocate the
program in memory without an MMU.

As an example, the Intel 8086 chip has the concept of separate "code
segment" and "data segment" registers; when a program needs to address
a location in its data space, it refers to it as "ds:xxxx", which means
"give me whatever is xxxx bytes from the beginning of the memory segment
named by the DS register".  Similarly, programs can refer to instructions
as "cs:xxxx", which is the same thing, only relative to the segment named
by the CS register.  This allows the kernel to move the program's memory
location (say, to swap it out and then swap it in to a different location)
and allow the program to continue executing, simply by changing the value
of the CS and DS registers to reflect its new location.  This is different
from non-split I&D operation, where all memory locations are specified
relative to a single location; thus on a processor with maximum 64K
address space, a non-split program can only be 64K, but a split program
can be up to 128K (split between a 64K instruction segment and a 64K
data segment, of course).  This is almost as useful as having a bigger
address space; it falls down when you have a program that needs more
than 64K of instructions or data.

[Of course, this doesn't work so well on the 8086, since it has no concept
of a "supervisor mode" for the CPU, and thus a program can go ahead and
change CS and DS on its own to address different parts of memory; perhaps
memory that it shouldn't have access to.  This is why Unix running on the
8086 is very insecure; a malicious program can very easily modify its
process table entry in the kernel to, say, change its UID to 0.  Since
the 8086 has no memory protection, the program can do this without the
kernel noticing, or even caring.  More modern and better-designed chips
(chips that were, perhaps, designed with multitasking in mind) will not
allow a program to change or otherwise access memory it doesn't "own" --
my hypothetical program will dump core on any reasonable CPU running Unix.
(And this is why, BTW, it's impossible to impliment a secure Unix on
an 8086 or 8088.)]

response 12 of 60:

Aug 5 13:02 UTC 1991

[Marc slipped in...]

response 14 of 60:

May 21 13:45 UTC 1994

re:#13
Unless it's a Model IV it'll only run warez specifically written for it, d
despite the fact that you MAY have a CP/M emulator for it (it's not compatible
with real CP/M), only the model IV's CP/M emulator was standard CP/M. If it's
a Model I pack it up and keep it somewhere it's almost a museeum piece. MIKE..

response 16 of 60:

Sep 21 14:01 UTC 1994

Hello, everyone. I'm the new FW to hardware. Any junk collector could
have been, so it might as well be me. My intent is that this conf
run just as it has been, which, incidentally, is much like any other
junk box: we toss in stuff that used to work, and draw from it parts
and inspirations for new concoctions. Today is flea market day, so all
the boxes are out, and I invite you to do a good BROWSE through them,
and maybe stir them up a bit, for who knows what goodie might be down
at the bottom. Best of all, everything's FREE - but if you take out
a thingy, please put in another, so we can keep the boxes at least
up to the last generation.

response 18 of 60:

Sep 25 22:57 UTC 1994

Yea, but never into anything useful!

response 20 of 60:

Oct 1 06:23 UTC 1994

Hmmmm.... I'm the sole fw here, currently, but someone added the quote
from -R2D2 - who with root is fooling around?

response 22 of 60:

Nov 15 01:31 UTC 1994

I'm new to this conference. I have a Z-183 Zenith laptop computer with
an 8088 processor. When I bought the computer several years ago there
was an option of a 1 Meg memory expansion. I didn't purchase this option
and when I inquired about it now was told that it is no longer available.
Does anyone out there know where I might obtain this option. The old part
number is ZA-180-47, the new part number is 971-0196 and the description 
is 1MB EMS RAM option. If you can help me with this, would you either
answer here or send me E mail at sail@cyberspace.org.

response 24 of 60:

Nov 18 20:37 UTC 1994

find Dan